الرئيسية

عدد زيارات البروفايل (1207)   

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تحميل تاريخ رفع المحاضرة نوع الملف المرحلة القسم الكلية اسم المحاضرة ت
2019/04/15 pdf 1 رئاسة الجامعة المستنصرية قسم شؤون الديوان Text_All 1
2019/04/15 pdf 1 رئاسة الجامعة المستنصرية قسم شؤون الديوان Lec_B 2
2019/04/15 pdf 1 رئاسة الجامعة المستنصرية قسم شؤون الديوان Lec_A1 3

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رابط البحث قاعدة البيانات تاريخ النشر اسم المجلة اسم الباحث عنوان البحث ت
scopus 2018-01 IEEE Journal of the Electron Devices Society . Simulation Study of Vertically Stacked Lateral Si Nanowires Transistors for 5-nm CMOS Applications 1
scopus 2018-06 Applied Sciences . Correlation between the Golden Ratio and Nanowire Transistor Performance 2
scopus 2014-06 IEEE Transactions on Electron Devices . Comparison Between Bulk and FDSOI POM Flash Cell: A Multiscale Simulation Study 3
scopus 2016-01 IEEE oint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon . Influence of quantum confinement effects and device electrostatic driven performance in ultra-scaled SixGe1−x nanowire transistors 4
local 2009-10 Anbar Journal for Engineering Sciences . A Proposed Improvement Model for MC-CDMA in Selective Fading Channel 5
scopus 2017-10 IEEE International Conference on Simulation of Semiconductor Processes and Devices . Does a nanowire transistor follow the golden ratio? A 2D Poisson-Schrödinger/3D Monte Carlo simulation study 6
scopus 2015-09 IEEE Nanotechnology Materials and Devices Conference . Performance of vertically stacked horizontal Si nanowires transistors: A 3D Monte Carlo/2D Poisson Schrodinger simulation study 7
scopus 2015-09 IEEE International Workshop on Computational Electronics . Influence of quantum confinement effects over device performance in circular and elliptical silicon nanowire transistors 8
scopus 2017-07 International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon . Vertically stacked lateral Si80Ge20 nanowires transistors for 5 nm CMOS applications 9
other_w 2018-06 University of Glasgow UK . Modelling and simulation study of NMOS Si nanowire transistors 10
scopus 2017-09 ECS Transactions and Proceedings of The Electrochemical Society . Modelling and Simulation of Advanced Semiconductor Devices 11
other_w 2017-07 International Workshop on Computational Nanotechnology, Windermere, UK . Position-Dependent Performance in 5 nm Vertically Stacked Lateral Si Nanowires Transistors 12
other_w 2017-07 International Workshop on Computational Nanotechnology, Windermere, UK . Variability-Aware Simulations of 5 nm Vertically Stacked Lateral Si Nanowires Transistors 13
other_w 2017-10 IEEE Nanotechnology Materials and Devices Conference . Vertically Stacked Lateral Nanowire Transistors: Optimisation for 5nm CMOS Technology 14
other_w 2017-11 IEEE Nanotechnology Materials and Devices Conference . Vertically Stacked Lateral Nanowire Transistors: Optimisation for 5nm CMOS Technology 15
scopus 2017-11 IEEE Journal of the Electron Devices Society . Simulation Study of Vertically Stacked Lateral Si Nanowires Transistors for 5 nm CMOS Applications 16
scopus 2017-01 Solid-State Electronics . Impact of quantum confinement on transport and the electrostatic driven performance of silicon nanowire transistors at the scaling limit 17
scopus 2015-09 IEEE Nanotechnology Materials and Devices Conference . Correlation between Gate Length, Geometry and Electrostatic Driven Performance in Ultra-Scaled Silicon Nanowire Transistors 18
scopus 2018-10 International Conference on Simulation of Semiconductor Processes and Devices . Impact of strain on the performance of Si nanowires transistors at the scaling limit: A 3D Monte Carlo/2D poisson schrodinger simulation study 19
scopus 2015-10 IEEE Transactions on Electron Devices . Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors 20
scopus 2016-05 IEEE International Symposium on Quality Electronic Design . Nanowire transistor solutions for 5nm and beyond 21

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